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Making Design Tradeoffs Portable: Solving the Institutional Memory Problem

Every chip you tape out teaches you something expensive: which macro placements choked routing, which architectural bet blew the power budget, which timing path needed three pipeline stages nobody scheduled for. And then almost none of it sticks around.

The knowledge stays in the heads of the engineers who lived through it, or it's buried in postmortems the next team might never open. So Chip B usually starts its floorplan from scratch, even when it shares a process node, a chunk of IP, or a whole architecture family with Chip A.

This is a harder problem than closing the loop inside a single design. Feeding backend results into the current floorplan is one thing. Making those lessons portable, so what you learned on one design actually shapes the next, is a much taller order, and honestly nobody has really cracked it.

It is harder than it sounds for several reasons..

It's the tradeoff that matters, not the numbers. A congestion map or IR figure from Chip A doesn't map onto Chip B: different floorplan, different IP mix, different node. What you actually want to carry over is the underlying relationship, that this kind of macro arrangement tends to invite this kind of congestion risk under these conditions. Extracting and encoding that is far harder than filing away a report.

There's no shared language. Different projects, sometimes different teams, usually different tool setups. Without a common way to say "here's what we learned," a lesson from one design has nowhere to land on the next.

Physics doesn't always travel. What held at one node can quietly stop holding at the next. Reuse has to be selective: keep the tradeoff logic, but know when the physics underneath it no longer applies.

It's the same thread running through agentic P&R, just stretched over a longer timescale. An agent mid-flow needs a unified view of the design in front of it; a team starting a new project needs that view carried across time. Get it right and signoff stops being the end of one design and starts becoming the memory the next one gets to build on. We don't think that's solved yet, and it's one of the problems we find most interesting to sit with.